C o r r y C o m p u t e r
p g . 2
Summer Intern
Samsung Advanced Institute of Technology, Gyeonggi-do, Korea,
06/04-07/04
Analyzed and verified MIMO-OFDM algorithm with Matlab Simulink
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Simulated finite wordlength effect of core blocks in the baseband receiver
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Optimized wordlength of successive interference cancellation
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Developed 'Multi-Carrier Mode Modem for IMT-2000 User Equipment and ASIC,' in the
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digital communication circuit team in cooperation with
Samsung
in Korea
Designed and simulated 3X-CDMA multi-carrier digital receiver
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Coded up digital ASIC functions such as digital phase lock loop (PLL), down converter and
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multi-carrier processor using VHDL
Optimized data wordlength in digital ASIC functions
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RELEVANT ACADEMIC PROJECTS
Project: Data Wordlength Reduction for Low-Power DSP Software
Spring 2004
Class: Embedded Software Systems
Analyzed number of transition in the digital signal processing blocks for portable devices and
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reduced wordlength for low power consumption at the software level
Led a team of four students; delegated work loads, listened to concerns and ideas and
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offered suggestions
Project: Optimum Wordlengths for Multiplier and Adder
Fall 2003
Class: High Speed Arithmetic
Analyzed number of gates for the multiplier and adder and found optimum wordlength to
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minimize the number of gate satisfying given performance
Project resulted in an 95% mark
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Project: Performance Evaluation of Fixed Broadband Wireless Access
Spring 2003
Class: Wireless Communications class
Analyzed and simulated Orthogonal Frequency Division Multiplexing (OFDM) broadband
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wireless access system using LabVIEW7
Simulated broadband wireless channel using the Stanford University Interim (SUI) channel
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model
Project: Minimum-ISI Time Domain Equalization for Fixed Wireless Access
Fall 2005
Class: Advanced Digital Signal Processing
Analyzed and simulated time domain equalizations for OFDM broadband wireless access
system using MATLAB